Photo-emission semiconductor device and method of manufacturing same

ABSTRACT

A photo-emission semiconductor device superior in reliability is provided. The photo-emission semiconductor device includes a semiconductor layer, a light reflection layer provided on the semiconductor layer, and a protective layer formed by electroless plating to cover the light reflection layer. Therefore, even if the whole structure is reduced in size, the protective layer reliably covers the light reflection layer without gap.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a photo-emission semiconductor devicehaving such a structure that light emitted toward a side opposite to anexit window side is reflected by a light reflection layer toward theexit window side and a method of manufacturing the same.

2. Description of the Related Art

The external quantum efficiency of a photo-emission semiconductor devicesuch as a light emitting diode (LED) is made up of two elements, namely,internal quantum efficiency and light extraction efficiency. Animprovement in these efficiencies makes it possible to realize along-life, low-power and high-output photo-emission semiconductordevice. Here, the internal quantum efficiency in the former is improvedby, for example, managing growth conditions precisely so as to obtain ahigh quality crystal with little crystal defect and dislocation, orproviding a layered structure capable of suppressing the occurrence ofcarrier overflow. On the other hand, the light extraction efficiency inthe latter is improved by, for example, providing a geometric shape or alayered structure that provides a large proportion of light, which isemitted from an active layer and enters at an angle less than an escapecone before the light is absorbed by a substrate and the active layer,to an exit window. In addition, an improvement may be also made byproviding a light reflection layer made of a material with a highreflectance, so that light emitted toward to a side opposite to the exitwindow side is reflected toward the exit window side.

Incidentally, in the photo-emission semiconductor device such as thelight emitting diode, the light reflection layer mentioned above usuallyfunctions as an electrode that injects current into a semiconductorlayer and thus is desired to be electrically in good contact with thesemiconductor layer. Therefore, generally, aluminum (Al), gold (Au),platinum (Pt), nickel (Ni), palladium (Pd) or the like that iselectrically in good contact with various kinds of semiconductor layerand has great versatility is used as a material of forming the lightreflection layer. However, even when these materials are applied to thelight reflection layer, the reflectance does not become so high andtherefore, these materials are often unsuitable for uses necessitating ahigh reflectance.

Thus, when a high reflectance is needed, silver (Ag) with an extremelyhigh reflectance is applied to the light reflection layer. Silver iselectrically in good contact with a semiconductor layer of a longwavelength region based on AlGaAs, AlGaInP or the like, and easilycauses ohmic contact. However, silver is electrically in poor contactwith a semiconductor layer of a short wavelength region based on GaN orthe like, and easily causes ohmic contact close to Schottky contact ascompared to other material bases, and therefore, linearity becomes low.Thus, in the past, there was proposed a technique of providing anextremely thin protective layer (so-called cover metal) having athickness of 0.1 nm to 0.5 nm both inclusive and containing platinum(Pt), palladium (Pd) or nickel (Ni), between a light reflection layermade of silver and a semiconductor layer (for example, see JapaneseUnexamined Patent Application Publication No. 2004-260178 and “Highthermally stable Ni/Ag(Al) alloy contacts on p-GaN”, Applied PhysicsLetters 90, 022102 (2007), by C. H. Chou, et. al.). Provision of thiscover metal prevents deterioration caused by oxidation of the lightreflection layer, and also prevents occurrence of electrochemicalmigration.

SUMMARY OF THE INVENTION

Such a cover metal is usually formed by a lift-off method. Specifically,first, the light reflection layer serving as a base layer is selectivelyformed on the semiconductor layer and then, a resist layer having anopening at a position corresponding to the light reflection layer andits periphery in a laminated direction is formed by using aphotolithography technique. Subsequently, a metal film made of nickel orthe like is formed over the entire surface by a vacuum depositionmethod, for example. Further, the metal film on an area covering theresist layer is removed (lifted off) together with the resist layer, sothat the resist layer on an area corresponding to the opening remains.In this way, the cover metal serving as an upper layer that covers thelight reflection layer is obtained.

However, the dimension accuracy and the disposition precision of thecover metal by such a lift-off method are largely influenced by manyvariable factors including the dimension accuracy of the opening in theresist layer, and the accuracy of alignment between the light reflectionlayer and the opening of the resist layer. For this reason, as a result,the size of the cover metal tends to vary. Therefore, it is conceivablethat with the microminiaturization of the photo-emission semiconductordevice itself expected in the future, the cover metal may not be able totightly cover the light reflection layer, so that the prevention of theoxidization of the light reflection layer and the prevention of theelectrochemical migration may become insufficient.

In view of the foregoing, it is desirable to provide a photo-emissionsemiconductor device having such a structure that a light reflectionlayer is covered by a minute protective layer with high dimensionaccuracy, and a method of manufacturing the photo-emission semiconductordevice.

According to an embodiment of the present invention, there is provided aphoto-emission semiconductor device including a semiconductor layer, alight reflection layer provided on the semiconductor layer, and aprotective layer formed by electroless plating to cover the lightreflection layer.

In the photo-emission semiconductor device according to the aboveembodiment of the present invention, the protective layer covering thelight reflection layer is formed from a plating film formed byelectroless plating and thus, the protective layer is disposed at apredetermined position with high accuracy, and has highly precisedimensions as well as a minute organization.

According to an embodiment of the present invention, there is provided amethod of manufacturing a photo-emission semiconductor device, themethod including the steps of forming a light reflection layer on asemiconductor layer, and forming a plating seed layer on the lightreflection layer and then, forming a protective layer by electrolessplating using the plating seed layer so as to cover at least the lightreflection layer.

In the method of manufacturing the photo-emission semiconductor deviceaccording to the embodiment of the present invention, the plating seedlayer is formed on the light reflection layer on the semiconductor layerand then, the protective layer is formed so as to cover the lightreflection layer by the electroless plating using the plating seedlayer. Therefore, the protective layer has highly precise dimensions andalignment accuracy as well as a minute organization.

According to the photo-emission semiconductor device and the method ofmanufacturing the same in the embodiment of the present invention, it ispossible to reliably cover the light reflection layer provided on thesemiconductor layer, by the protective layer that has a high mechanicalstrength and is formed by the electroless plating. Therefore, it ispossible to reliably prevent the oxidization and the electrochemicalmigration of the light reflection layer, while forming the lightreflection layer from silver or the like having high reflectance. As aresult, it is possible to provide a photo-emission semiconductor devicehaving high reliability, while supporting microminiaturization ofdimensions.

Other and further objects, features and advantages of the invention willappear more fully from the following description.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional diagram of a light emitting diode serving asan embodiment of the present invention;

FIG. 2A and FIG. 2B are cross-sectional diagrams illustrating oneprocess in a method of manufacturing the light emitting diodeillustrated in FIG. 1;

FIG. 3A and FIG. 3B are cross-sectional diagrams illustrating oneprocess following FIG. 2A and FIG. 2B;

FIG. 4A and FIG. 4B are cross-sectional diagrams illustrating oneprocess following FIG. FIG. 3A and FIG. 3B;

FIG. 5 is a cross-sectional diagram illustrating one process followingFIG. 4A and FIG. 4B;

FIG. 6 is a cross-sectional diagram illustrating one process followingFIG. 5;

FIG. 7 is a cross-sectional diagram illustrating one process followingFIG. 6; and

FIG. 8 is an electron micrograph representing a cross-section of thelight emitting diode serving as an experimental example.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

An embodiment of the present invention will be described below in detailwith reference to the drawings.

[Structure of Light Emitting Diode]

FIG. 1 illustrates a cross-sectional structure of a light emitting diode(LED) according to an embodiment of the present invention. Incidentally,FIG. 1 is a schematic diagram in which size and shape are different fromthose in reality.

The light emitting diode includes a semiconductor layer 20 containing anitride-based III-V group compound semiconductor, a p-side electrode 30,and an n-side electrode 35. The semiconductor layer 20 is a layeredproduct configured by laying a GaN layer 22, an n-type contact layer 23,an n-type cladding layer 24, an active layer 25, a p-type cladding layer26 and a p-type contact layer 27 in this order. The p-side electrode 30is provided on a surface of the p-type contact layer 27, and the n-sideelectrode 35 is provided on a surface of the GaN layer 2. Part of thep-side electrode 30 is connected to a conductive connection layer 33.The connection layer 33 is bonded to a support substrate 50 with anadhesive layer 39 (not illustrated here) in between. The light emittingdiode is a photo-emission semiconductor device of a type (so-calledbottom emission type) in which light emitted from the active layer 25exits through an n-type semiconductor layer configured to include then-type contact layer 23 and the n-type cladding layer 24.

The nitride-based III-V group compound semiconductor mentioned here is agallium nitride-based compound that contains gallium (Ga) and nitrogen(N), and there is, for example, GaN, AlGaN (aluminum gallium nitride),AlGaInN (aluminum gallium indium nitride) or the like. These containn-type impurities formed of IV group and VI group elements such as Si(silicon), Ge (germanium), O (oxygen), Se (selenium) and the like, orp-type impurities formed of II group and IV group elements such as Mg(magnesium), Zn (zinc), C (carbon) and the like, as needed.

The GaN layer 22 is made of, for example, undoped GaN having a thicknessof 0.5 μm, and is formed by being allowed to grow on a c-plane of asapphire with the use of a lateral direction crystal growth techniquesuch as an ELO (Epitaxial Lateral Overgrowth) technique. The n-typecontact layer 23 is made of, for example, n-type GaN having a thicknessof 4.0 μm, and the n-type cladding layer 24 is made of, for example,n-type AlGaN having a thickness of 1.0 μm.

The active layer 25 has, for example, a multi-quantum well structure inwhich undoped In_(x) Ga_(1-x) N well layer (0<x<1) having a thickness of3.5 nm and undoped In_(y) Ga_(1-y) N barrier layer (0<y<1) having athickness of 7.0 nm are formed as a pair, and the three pairs arelayered. The active layer 25 has, in a central area in its in-planedirection, a light emitting region 25A where a photon is generated byrecombination of injected electron and hole. The p-type cladding layer26 is made of, for example, p-type AlGaN having a thickness of 0.5 μm.The p-type contact layer 27 is made of, for example, p-type GaN having athickness of 0.1 μm, and has a p-type impurity concentration higher thanthat of the p-type cladding layer 26.

On part of the top surface of the p-type contact layer 27, a lightreflection layer 31 is provided. The light reflection layer 31 iscovered completely by a protective layer 32 that is a plating filmformed by electroless plating. The protective layer 32 is made of, forexample, an element selected from a group consisting of nickel (Ni),copper (Cu), palladium (Pd), gold (Au) and tin (Sn) or an alloyincluding two or more kinds of elements selected from the group.

Between the p-type contact layer 27 and the light reflection layer 31,there may be inserted, for example, a metal layer made of a transitionmetal such as palladium (Pd), nickel (Ni), platinum (Pt) and rhodium(Rh), or a material in which silver (Ag) is added to any of thesetransition metals. By providing this metal layer, there are expectedeffects such as an improvement in mechanical adhesion and an improvementin electrical contact between the p-type contact layer 27 and the lightreflection layer 31.

The light reflection layer 31 is made of a material having a metallicproperty, for example, silver (Ag) or its alloy, and has a thickness of10 nm or more and 500 nm or less, for example. As the silver alloy,there is an alloy formed by adding at least one of materials includingplatinum (Pt), palladium (Pd), gold (Au), copper (Cu), indium (In) andgallium (Ga) to silver. To be more specific, the light reflection layer31 is a so-called APC alloy containing 98% of silver, 1% of palladium,and 1% of copper.

Pure silver and silver alloy each have an extremely high reflectance.For this reason, the light reflection layer 31 performs a function ofreflecting, of the light emitted from the light emitting region 25A ofthe active layer 25, the light heading for the side opposite to the GaNlayer 22 serving as an exit window, toward the GaN layer 22. Inaddition, the light reflection layer 31 forms the p-side electrode 30together with a metal layer 32A (to be described later) and theprotective layer 32, and is electrically connected to the connectionlayer 33. Therefore, the light reflection layer 31 is also desired to beelectrically in good contact with the p-type contact layer 27.

On the top surface of the light reflection layer 31, the metal layer 32Ais provided. The metal layer 32A functions as a plating seed layer (aplating seed layer) in forming the protective layer 32 by theelectroless plating. A material forming the metal layer 32A is, forexample, nickel or nickel alloy.

[Method of Manufacturing Light Emitting Diode]

Next, an example of the method of manufacturing the light emitting diodehaving such a structure will be described in detail with referenced toFIG. 2A to FIG. 7. Any of FIG. 2A through FIG. 7 illustrates across-sectional structure of the light emitting diode in a productionprocess. Here, a case in which plural light emitting diodes arecollectively formed will be taken as an example and described.

First, as illustrated in FIG. 2A, for example, a sapphire with anexposed c-plane is prepared as a substrate 10 and then, on the c-plane,a semiconductor film 20A made of a nitride based III-V group compoundsemiconductor is formed all over the surface, with a buffer layer 11 inbetween, by MOCVD (Metal Organic Chemical Vapor Deposition) method, forexample. The buffer layer 11 also is formed by being allowed to grow ata low temperature on the c-plane of the sapphire by the MOCVD method,and is composed of, for example, undoped GaN having a thickness of 30nm. In this case, for example, as raw materials of a GaN based compoundsemiconductor, for example, trimethylaluminum (TMA), trimethylgallium(TMG), trimethyl indium (TMIn) and ammonia (NH₃) are used; as a rawmaterial of a donor impurity, for example, silane (SiH₄) is used; and asa raw material of an acceptor impurity, for example,bis(methylcyclopentadienyl)magnesium ((CH₃C₅H₄)₂Mg) orbis(cyclopentadienyl)magnesium ((C₅H₅)₂Mg) is used.

Specifically, first, the surface (c-plane) of the substrate 10 iscleaned by, for example, thermal cleaning. Subsequently, on the cleanedsubstrate 10, the buffer layer 11 is allowed to grow at a lowtemperature of around 500° C. by, for example, the MOCVD method andthen, the GaN layer 22 is allowed to grow at a growth temperature of,for example, 1,000° C., by the lateral direction crystal growthtechnique such as the ELO.

Subsequently, on the GaN layer 22, the n-type contact layer 23, then-type cladding layer 24, the active layer 25, the p-type cladding layer26 and the p-type contact layer 27 are sequentially allowed to grow by,for example, the MOCVD method. Here, suppose the growth temperature ofthe n-type contact layer 23, the n-type cladding layer 24, the p-typecladding layer 26 and the p-type contact layer 27 that are layers notincluding indium (In) is, for example, around 1,000° C., and the growthtemperature of the active layer 25 that is a layer including indium (In)is, for example, 700° C. or more and 800° C. or less. After undergoingsuch crystal growth, the semiconductor layer 20 is heated at atemperature of 600° C. or more and 700° C. or less for several tens ofminutes, and thereby the acceptor impurities in the p-type claddinglayer 26 and the p-type contact layer 27 are activated.

Next, on the p-type contact layer 27, a resist pattern 40 in apredetermined shape is formed. Subsequently, as illustrated in FIG. 2B,by using this resist pattern 40 as a mask, an exposed part of thesemiconductor film 20A is lowered by digging until the exposed partreaches the n-type contact layer 23, by, for example, RIE (Reactive IonEtching) method using chlorine-based gas, so that a convex section 28 isformed.

Subsequently, as illustrated in FIG. 3A, the resist pattern 40 isremoved and then, on the p-type contact layer 27, the light reflectionlayer 31 and the metal layer 32A are laid sequentially by sputtering,for example.

After the metal layer 32A is formed, as illustrated in FIG. 3B, theprotective layer 32 is formed to completely cover the light reflectionlayer 31, by the electroless plating using the metal layer 32A as aplating seed layer. As a result, the p-side electrode 30 is obtained. Atthis time, the top surface (the surface on the side opposite to thep-type cladding layer 26) of the p-type contact layer 27, an end surfaceof the light reflection layer 31 and the surface of the metal layer 32Aare at least immersed in a plating bath. This causes plating growth notonly on the surface of the metal layer 32A but also on the surface ofthe p-type contact layer 27 on an area around the metal layer 32A. Inother words, here, the plating growth takes place, from one or moreregions of the metal layer 32A, the light reflection layer 31 and thep-type contact layer 27. As a result, there is formed the protectivelayer 32 that is precise and strong and covers the surroundings of thelight reflection layer 31 and the metal layer 32A. Here, it is desirableto adjust the surface potentials of the metal layer 32A and the lightreflection layer 31, and the electric potential of the p-type claddinglayer 26 that fluctuates by those surface potentials, by changing atleast one of the thickness of the metal layer 32A and the composition ofthe material. The reason is because this makes it possible to controlthe electrochemical reactivity in the plating bath, and adjust theformation area (spread) of the protective layer 32 that is a platingfilm. In particular, the electric potential of the p-type cladding layer26 converges to a self-potential in the plating bath, as going away fromthe metal layer 32A according to the size of the internal resistance ofthe p-type cladding layer 26 in itself. By controlling the gradient ofthis electric potential, the formation area (spread) of the protectivelayer 32 is adjustable. Incidentally, FIG. 3A and FIG. 3B illustrate theexample in which the metal layer 32A is provided to cover the entire topsurface of the light reflection layer 31, but the metal layer 32A may beformed to cover only part of the top surface of the light reflectionlayer 31. Changing the surface area of the metal layer 32A in this wayalso can control the reactivity of the electrochemical reaction andthus, the protective layer 32 having a desired planar shape and adesired cross-section is obtainable. FIG. 8 is an electron micrographrepresenting an example of the cross-section of the light emitting diodein the process equivalent to FIG. 3B. However, in FIG. 8, a cap layerCap is formed further on the metal layer 32A serving as the plating seedlayer, and only the end surface of the metal layer 32A contacts theprotective layer 32. According to FIG. 8, it is recognized that theprotective layer 32 is formed to also fill the gap between the adjacentconvex sections 28 in the semiconductor film 20A. This is considered tobe a piece of evidence of the plating growth occurring by also using thesurface of the semiconductor film 20A, which is apart from the metallayer 32A serving as the plating seed layer, as a base point.

Subsequently, as illustrated in FIG. 4A, a resist is applied to coverthe whole so that an insulating film 37A is formed. Afterwards, heattreatment (baking) is performed as needed and then, as illustrated inFIG. 4B, the insulating film 37A is selectively removed by using aphotolithography technique so that part of the top surface of theprotective layer 32 is exposed, and thereby an insulating layer 37 isformed.

Subsequently, by forming and then patterning a plating film made ofcopper (Cu) or the like by, for example, an electroplating method, theconnection layer 33 connected to the p-side electrode 30 is formed asillustrated in FIG. 5. Afterwards, the adhesive layer 39 is formed tocover the connection layer 33 and fill its periphery, and the supportsubstrate 50 made of sapphire or the like is bonded to the connectionlayer 33 with the adhesive layer 39 in between.

Subsequently, from the back side of the substrate 10, an excimer laser,for example, is emitted over the entire surface. This causes laserablation, resulting in separation of an interface between the substrate10 and the buffer layer 11. Afterwards, as illustrated in FIG. 6,chemical mechanical polishing (CMP) is performed in a laminateddirection from the buffer layer 11 side, so that the adjacent convexsections 28 are separated from each other and thereby the semiconductorlayer 20 is obtained.

Further, a titanium (Ti) layer, a platinum (Pt) layer and a gold (Au)layer are laid sequentially in this order by vapor deposition or thelike, to cover the side opposite to the p-side electrode 30 in thesemiconductor layer 20 exposed by CMP processing and then, patterning isperformed to form a predetermined shape, so that the n-side electrode 35is formed (see FIG. 7).

Finally, by going through a predetermined process such as division foreach of the semiconductor layers 20, the light emitting diode of thepresent embodiment is produced.

In the light emitting diode produced in this way, when current issupplied to the p-side electrode 30 and the n-side electrode 35, thecurrent is injected into the light emitting region 25A of the activelayer 25, and thereby light emission by the recombination of electronand hole takes place. Light L1, which directly heads for the GaN layer22 serving as the exit window, among the light of light emissionproduced in this light emitting region 25A, passes through the substrate10 and is emitted to the outside. Light L2 and light L3 heading for theside opposite to the GaN layer 22 are reflected by the light reflectionlayer 31 toward the GaN layer 22 and then, passes through thesemiconductor layer 20 and is emitted to the outside (see FIG. 1).

At this time, the light L2 and the light L3 are reflected by the lightreflection layer 31 configured to include silver (Ag) having anextremely high reflectance and thus, the reflectance and the lightextraction efficiency become greater than those in a case in which thelight reflection layer 31 does not include silver (Ag).

[Operation and Effect of Present Embodiment]

In this way, in the present embodiment, the protective layer 32 coveringthe light reflection layer 31 is formed from the plating film formed bythe electroless plating and thus, the protective layer 32 has highlyprecise dimensions and a minute organization. Further, in the formationof the metal layer 32A, the metal layer 32A is formed beforehand as theplating seed layer, and the plating growth is caused also on the surfaceof the p-type contact layer 27 in the area around the metal layer 32A bythe electrochemical reaction with the plating bath and thus, thealignment accuracy of the protective layer 32 improves. In particular,when the surface potential of the metal layer 32A is adjusted bychanging the composition of the metal layer 32A or changing its surfacearea, and thereby a force to absorb metal ions in the plating bath (achemical force that draws metal ions to the metal layer 32A) isadjusted, the protective layer 32 having a higher degree of dimensionaccuracy and alignment accuracy is obtained. In other words, accordingto the light emitting diode and the method of manufacturing the same ofthe present embodiment, the light reflection layer 31 provided on thesemiconductor layer 20 is reliably covered without gap, by theprotective layer 32 having a great mechanical strength and is formed bythe electroless plating. Therefore, it is possible to reliably preventthe oxidization and the electrochemical migration of the lightreflection layer 31, while forming the light reflection layer 31 fromsilver (Ag) or the like having high reflectance. As a result, it ispossible to realize high reliability, while supporting themicrominiaturization of the dimensions of the entire structure.

The present invention has been described by using the embodiment, butthe present invention is not limited to the aspect described above, andmay be variously modified. For example, in the embodiment describedabove, the electroless plating is performed in the state in which thesurface of the metal layer 32A is exposed. However, a cap layer may befurther provided between the metal layer 32A and the protective layer32, and the electroless plating may be performed in a state in whichonly the end surface of the metal layer 32A is exposed. This makes itpossible to control the electrochemical reaction in the plating bath bychanging only the thickness of the metal layer 32A, without changing thecomposition of the material or the formation area of the metal layer32A. Therefore, even in this case, it is possible to obtain theprotective layer 32 in which the planar shape and the cross-sectionalshape are defined with higher accuracy, and an effect similar to that ofthe above-described embodiment is achievable. Here, the cap layer may bemade of a material that does not cause an oxidation-reduction reactionin the plating bath, including, for example, a metallic material such asgold (Au) or platinum (Pt) and an inorganic material such as SiO₂. Thecap layer is not limited to a single-layer structure, and may be amultilayer structure of two more layers. Moreover, another metal layermay be provided between the metal layer 32A and the light reflectionlayer 31.

Furthermore, the embodiment has been described above for the lightemitting diode configured to include the nitride-based III-V groupcompound semiconductor, but the present invention is not limited tothis, and is applicable to a light emitting diode of a long wavelengthregion, made of other semiconductor materials of, for example, AlGaAsbase, AlGaInP base and the like.

The present application contains subject matter related to thatdisclosed in Japanese Priority Patent Application JP 2010-078239 filedin the Japan Patent Office on Mar. 30, 2010, the entire content of whichis hereby incorporated by reference.

It should be understood by those skilled in the art that variousmodifications, combinations, sub-combinations and alterations may occurdepending on design requirements and other factors insofar as they arewithin the scope of the appended claims or the equivalents thereof.

1. A photo-emission semiconductor device comprising: a semiconductorlayer; a light reflection layer provided on the semiconductor layer; anda protective layer formed by electroless plating to cover the lightreflection layer.
 2. The photo-emission semiconductor device accordingto claim 1, wherein the light reflection layer is made of silver (Ag) ora silver alloy, and the protective layer is made of an element selectedfrom a group consisting of nickel (Ni), copper (Cu), palladium (Pd),gold (Au) and tin (Sn), or an alloy including two or more kinds ofelements selected from the group.
 3. The photo-emission semiconductordevice according to claim 1, further comprising a metal layer betweenthe light reflection layer and the protective layer.
 4. Thephoto-emission semiconductor device according to claim 3, furthercomprising a cap layer between the metal layer and the protective layer.5. The photo-emission semiconductor device according to claim 3, whereinthe protective layer is made of an element selected from a groupconsisting of nickel (Ni), copper (Cu), palladium (Pd), gold (Au) andtin (Sn), or an alloy including two or more kinds of elements selectedfrom the group.
 6. The photo-emission semiconductor device according toclaim 1, wherein the semiconductor layer has a layered structureincluding an n-type semiconductor layer, an active layer and a p-typesemiconductor layer.
 7. A method of manufacturing a photo-emissionsemiconductor device, the method comprising the steps of: forming alight reflection layer on a semiconductor layer; and forming a platingseed layer on the light reflection layer, and then forming a protectivelayer by electroless plating using the plating seed layer so as to coverthe light reflection layer.
 8. The method of manufacturing thephoto-emission semiconductor device according to claim 7, wherein theprotective layer is allowed to grow from one or more regions of theplating seed layer, the light reflection layer and the semiconductorlayer.
 9. The method of manufacturing the photo-emission semiconductordevice according to claim 7, wherein a planar shape and across-sectional shape of the protective layer are adjusted throughchanging an exposure area size of the plating seed layer.
 10. The methodof manufacturing the photo-emission semiconductor device according toclaim 7, wherein the planar shape and the cross-sectional shape of theprotective layer are adjusted through changing a surface potential ofthe plating seed layer by selection of a material of the plating seedlayer.